Power conversion systems are used to generate and provide AC output power to a load, such as a single or multi-phase AC motor driven by an inverter stage of a motor drive power converter. In certain situations, it is desirable to connect two or more motor drives to provide output power to a single driven motor load. In these situations, the drives may be connected to one another and/or to a main controller by data links for exchanging timing and control information. The inverter output stages of the motor drives, moreover, are typically pulse width modulated using a triangle wave carrier, and it is desirable that the carriers used in the parallel-connected inverter outputs be synchronized to mitigate circulating currents. Accordingly, it is advantageous that exchange of carrier wave information through a digital data path between the motor drives be synchronized. However, oscillators, crystals and other digital data transfer clock sources in the various drives and controllers are typically imperfect, and the clock frequency at one device will generally be slightly different from that of another device. Moreover, these clock sources are typically not synchronized with one another, and instead non-zero phase offsets are common. In the past, the receivers at each device included clock adjustment features to adjust the receiver clock according to synchronization pulses. However, such clock adjustment and the provision of sync pulses can only achieve a certain level of synchronization between parallel-connected motor drives. Accordingly, a need remains for improved methods and apparatus for mitigating clock variations in parallel-connected motor drives to reduce the adverse effects of circulating currents.